/**
 *  \file   ddc_dsl_api.h
 *
 *  \author Copyright (C) 2001-2006 Texas Instruments Incorporated.
 *
 *  \brief  This file defines DSL Driver Core API.
 *  
 *  \date   08/31/2006  EP      Created.
 *          9/15/2006   AV      Moved SAR interrupt block definition here.
 *          9/25/2006   AV      Added the OAM channel queue definitions.
 *          9/26/2006   AV      Making changes in the ddc_atm_init to pass in the Rx 
 *                              and Tx Queues to use for the OAM channel. 
 *          2/7/2007    CZ      fix CQ11294. Moved #define RESERVED_OAM_CHANNEL 15 to here
 *          2/14/2007   EP      Added env. variable for setting CPPI error handling.
 */

#ifndef _DDC_DSL_API_H_
#define _DDC_DSL_API_H_

#include "dsl_hal_api.h"
#include "dsl_hal_support.h"
#include "dsl_hal_csl.h"

#ifdef UR8_SAR

    #include "ddc_cpsardrv.h"
   
    typedef CpsarDDCObj DDC_CpsarDevice;

    typedef enum {
        SAR_IS_TX_INT,
        SAR_IS_RX_INT
    }intr_type;

#endif /* UR8_SAR */

#define DDC_MOD_ADSL          1
#define DDC_DEF_ADSL_IDLE     1
#define DDC_DEF_ADSL_TRAINING 2
#define DDC_DEF_ADSL_SYNC     3
#define DDC_DEF_ADSL_ACTIVITY 4

//AV Adding some defines for some common return values.
#define DDC_DSL_ENODEV 19
#define DDC_DSL_EBUSY  16
#define DDC_DSL_EINVAL 22

//CZ moved from ddc_ti_dsl.h
#define RESERVED_OAM_CHANNEL    15

/**
 *  Definitions
 */

/** \brief  Size of SAR Channel DMA look up table */
#define MAX_DMA_CHAN      16

/** \brief  For proc functions */
#define DDC_DSL_NOT_FINISHED    0   /**< Finished */
#define DDC_DSL_FINISHED        1   /**< Not finished */

/** \brief  SAR interrupt number */
#define ATM_SAR_INT             15  /**< SAR interrupt */
#define ATM_SAR_INT_PACING_BLOCK_NUM    2
#define ATM_SAR_INT_RX_INT              34  /** for UR8 */
#define ATM_SAR_INT_TX_INT              17  /** for UR8 */

/** \brief  SAR interrupt vs. DSL interrupt */
typedef enum{
    TI_SAR_INT,     /**< SAR interrupt */
    TI_DSL_INT      /**< DSL interrupt */
}ti_dsl_int_t;


/* TBD: moved to DDA */

/** \brief  CLEAR EOC VPI */
#define CLEAR_EOC_VPI         0
/** \brief  CLEAR EOC VCI */
#define CLEAR_EOC_VCI         11

/** \brief  Remote Management VPI */
#define REMOTE_MGMT_VPI       0
/** \brief  Remote Management VCI */
#define REMOTE_MGMT_VCI       16

#define EOC_DMA_CHAN      MAX_DMA_CHAN      /**< reserve this chan for clear eoc */
#define ATM_NO_DMA_CHAN   MAX_DMA_CHAN + 1  /**< no tx dma channels available */

#define NUM_ELEMS(x)          (sizeof(x)/sizeof(x[0]))


/**
 *  Data structures 
 */

/**
 *  \brief  Host based look up table to xref Channel Id's, VPI/VCI, LC, CID, packet type
 */
typedef struct
{
  int         inuse;       /**< is DMA channel available (1=y)  */
  int         chanid;      /**<  DMA channel ID   (0-0x1f) This corresponds to the Channel ID
                              that is used in the connection config reg (TN7ATM_CONN_CONFIG) */
  int         vpi;         /**< Virtual path identifier */
  int         vci;         /**< Virtual channel identifier      */
  void        *vcc;        /**< DDA call-back device structure. */
  int         bClosing;    /**< Flag to indicate that the channel is closing */
  int         ready;       /**< Flag to indicate that the channel is ready */
  int         sarRxBuf;    /**< Number of Rx Buffers per channel */
  int         sarRxMax;    /**< Number of Rx Buffers to be serviced per interrupt */
  int         sarTxBuf;    /**< Number of Tx Buffers per channel */
  int         sarTxMax;    /**< Number of Tx Buffers to be serviced per interrupt */

} DDC_atm_lut_t;

/**
 *  \brief  DDC per-device data structure
 */
typedef struct
{
  int                         lConnected;   /**< Flag to indicate whether the DSL link is up or not. */
  int                         dslInSync;    /**< Flag to indicate whether the DSL link is up or not. */
  int                         dsl_int;      /**< Default DSL Interrupt vector value */
#ifdef AR7_SAR      
  /* Tnetd73xx CPHAL */
  void                        *pSarHalDev;  /**< TBD */
  void                        *pSarHalFunc; /**< TBD */
  void                        *pSarOsFunc;  /**< These need to be initialized by the DDA in the future. */
  void                        *halIsr;      /**< TBD */
#endif
/* CPHAL */
  #ifdef UR8_SAR
  DDC_CpsarDevice            *SarDev;       /**< Pointer to Cpsar object */
  unsigned int               OamCh_rxQ;     /**< The Rx queue to use for the OAM channel. */
  unsigned int               OamCh_txQ;     /**< The Tx queue to use for the OAM channel. */
  #endif
  void                       *SarIsr;       /**< Pointer to SAR Interrupt handler */
  int                         int_num;      /**< Default SAR Interrupt vector value */
  int                         sar_freq;     /**< SAR frequency */
  int                         sarRxBuf;     /**< Number of Rx Buffers per channel */
  int                         sarRxMax;     /**< Number of Rx Buffers to be serviced per interrupt */
  int                         sarTxBuf;     /**< Number of Tx Buffers per channel */
  int                         sarTxMax;     /**< Number of Tx Buffers to be serviced per interrupt */

  int                         bTurboDsl;    /**< Flag to enable the Turbo-DSL feature. */
  int                         bCppiErrProc; /**< Flag to set CPPI error handling. */

  DDC_atm_lut_t               lut[MAX_DMA_CHAN+1];  /**< SAR Channel DMA look up table (LUT) */

  int                         nohost_flag;          /**< Flag to disable the reading of the Host-DSP memory. */
  int                         bMarginRetrainEnable; /**< Flag to enable the retrain based on margin */

  unsigned int                dslReg;       /**< TBD */
  unsigned int                def_sar_inter_pace;   /**< Default Interrupt pacing value */

  void                        *dev;         /**< The OS Specific device pointer.*/
  PITIDSLHW_T                  pIhw;        /**< DSL_HAL structure */
  void                        *hnd_LED_0;   /**< Handle for the LED */
} DDC_DslPriv;

/**
 *  \brief  Params for the activate vc function 
 */
typedef struct
{
    DDC_DslPriv *priv;  /**< TBD */
    int vpi;            /**< TBD */
    int vci;            /**< TBD */
    int pcr;            /**< TBD */
    int scr;            /**< TBD */
    int mbs;            /**< TBD */
    int cdvt;           /**< TBD */
    int chan;           /**< TBD */
    int qos;            /**< TBD */
    int priority;       /**< TBD */
    int rq_num;  /**< The Recieve queue to use UR8 only. */
    int tq_num;  /**< The Transmit Complete queue to use UR8 only. */
} DDC_atm_activate_vc_parm_t;

/**
 *  \brief  DSL SAR statistics
 */
typedef struct
{
  unsigned int txErrors;    /**< TBD */
  unsigned int rxErrors;    /**< TBD */
  unsigned int rxPktCnt;    /**< TBD */
  unsigned int txPktCnt;    /**< TBD */
  unsigned int rxBytes;     /**< TBD */
  unsigned int txBytes;     /**< TBD */
} DDC_sar_stat;


/**
 *  API
 */

/**
 *  Init/Close
 */

/**
 *  \brief  Device Initialization.
 *
 *  @param  priv    Pointer to main private data structure (to be initialized).
 *  @param  dev     Pointer to device data structure provided by OS.
 *  @param  OamTxQ  The Tx queue to use. This is only valid for UR8.
 *  @param  OamRxQ  The Rx queue to use. This is only valid for UR8.
 *
 *  @return 0:      Success
 *          other:  Failure
 */
int DDC_atm_init (DDC_DslPriv **privP, void *dev, unsigned int OamTxQ, unsigned int OamRxQ);

/**
 *  \brief  Device Shutdown.
 *
 *  @param  priv    Pointer to main private data structure (to be freed).
 *
 *  @return 0:      Success
 */
int DDC_atm_close (DDC_DslPriv **priv);

/**
 *  \brief  Activate one SAR channel.
 *
 *  @param  pVcPrm  Pointer to channel data structure with parameters to be used.
 *
 *  @return 0:      Success
 *          -1:     Failure
 */
int DDC_sar_activate_vc (DDC_atm_activate_vc_parm_t * pVcPrm);

/**
 *  \brief  De-Activate one SAR channel.
 *
 *  @param  priv    Pointer to main private data structure.
 *  @param  chan    Channel number.
 *
 *  @return 0:      Success
 *          -1:     Failure
 */
int DDC_sar_deactivate_vc(DDC_DslPriv *priv, int chan);

/**
 *  \brief  Set modulation
 *
 *  @param  priv    Pointer to DSL driver private data
 *  @param  data    
 *  @param  flag    
 *
 *  @return  0:         Success
 *          -1:         Failure
 */
unsigned DDC_dsl_set_modulation(DDC_DslPriv *priv, void* data, int flag);


/**
 *  Clear EOC
 */

/**
 *  \brief  Initialization for Clear EOC handling.
 *
 *  @param  priv    Pointer to main private data structure.
 *
 *  @return 0:      Success
 */
int DDC_dsl_clear_eoc_setup(DDC_DslPriv *priv);

/**
 *  \brief  Send Clear EOC data.
 *
 *  @param  priv    Pointer to main private data structure.
 *  @param  data    TBD.
 *  @param  len     TBD.
 *  @param  ackFlag TBD.
 *
 *  @return 0:      Success
 *          other:  Failure
 */
int DDC_dsl_clear_eoc_send(DDC_DslPriv *priv, unsigned char *data, unsigned len, int ackFlag);

/**
 *  \brief  Receive Clear EOC data.
 *
 *  @param  priv    Pointer to main private data structure.
 *
 *  @return 0:      Success
 *          other:  Failure
 */
int DDC_dsl_clear_eoc_receive(DDC_DslPriv *priv);

/**
 *  \brief  Close Clear EOC channel.
 *
 *  @param  priv    Pointer to main private data structure.
 *
 *  @return 0:      Success
 *          other:  Failure
 */
int DDC_dsl_clear_eoc_close(DDC_DslPriv *priv);


/**
 *  Common
 */

/**
 *  \brief  SAR HAL ISR.
 *
 *  @param  priv    Pointer to main private data structure.
 *  @param  irq     TBD.
 *  @param  more    TBD.
 *
 *  @return 0:      Success
 */
int DDC_sar_handle_interrupt(DDC_DslPriv *priv, int irq, int *more);

/**
 *  \brief  DSL HAL ISR.
 *
 *  @param  priv    Pointer to main private data structure.
 *
 *  @return 0:      Success
 */
int DDC_dsl_handle_interrupt(DDC_DslPriv *priv);

/**
 *  \brief  Generic function to read one word (32-bit) from DSP host interface.
 *          TBD: broken.
 *
 *  @param  priv    Pointer to main private data structure.
 *  @param  num     Number of offset layers.
 *  @param  offset  Pointer to an array of offsets.
 *  @param  data    Pointer to data read.
 *
 *  @return 0:      Success
 */
int DDC_dsl_generic_read(DDC_DslPriv * priv, int num, int *offset, unsigned* data);

/**
 *  \brief  Generic function to read one word (32-bit) from DSP host interface.
 *          TBD: broken.
 *
 *  @param  priv    Pointer to main private data structure.
 *  @param  num     Number of offset layers.
 *  @param  offset  Pointer to an array of offsets.
 *  @param  data    Data to be written.
 *
 *  @return 0:      Success
 */
int DDC_dsl_generic_write(DDC_DslPriv * priv, int num, int *offset, unsigned data);

/**
 *  \brief  Initialize one TX DMA channel 
 *
 *  @param  priv    Pointer to main private data structure.
 *  @param  vcc     VCC
 *  @param  vpi     VPI
 *  @param  vci     VCI
 *  @param  chan    Channel number
 *  @return  0:     Success
 *          -1:     Failure
 */
int DDC_atm_set_lut (DDC_DslPriv * priv, void *vcc, int vpi, int vci, int chan);

/**
 *  \brief  Clear one TX DMA channel 
 *
 *  @param  priv    Pointer to main private data structure.
 *  @param  chan    Channel number
 */
int DDC_atm_lut_clear (DDC_DslPriv *priv, int chan);

/**
 *  \brief  Find a TX DMA channel that matches a vpi/vci pair
 *
 *  @param  priv    Pointer to main private data structure.
 *  @param  vpi     VPI
 *  @param  vci     VCI
 *
 *  @return DMA channel number
 */
int DDC_atm_lut_find (DDC_DslPriv *priv, short vpi, int vci);

/**
 *  \brief  Find a TX DMA channel that is not used
 *
 *  @param  priv    Pointer to main private data structure.
 *
 *  @return DMA channel number
 */
int DDC_atm_walk_lut (DDC_DslPriv * priv);

/**
 *  \brief  Configure Modem
 *
 *  @param  priv    Pointer to DSL driver private data
 *  @param  data    TBD
 *
 *  @return  0:         Success
 *          -1:         Failure
 */
void DDC_dsl_chng_modulation(DDC_DslPriv *priv, void* data);

/**
 *  \brief  Turn on DSL link LED
 *
 *  @param  priv    Pointer to DSL driver private data
 *
 *  @return         None
 */
void DDC_dsl_led_on(DDC_DslPriv *priv);

/**
 *  \brief  Turn off DSL link LED
 *
 *  @param  priv    Pointer to DSL driver private data
 *
 *  @return         None
 */
void DDC_dsl_led_off(DDC_DslPriv *priv);

/**
 *  \brief  Initialize DSL link LED for HOST control
 *
 *  @param  priv    Pointer to DSL driver private data
 *
 *  @return         None
 */
void DDC_dsl_led_init(DDC_DslPriv *priv);

/**
 *  \brief  Call SAR HAL to flush TX queue.
 *
 *  @param  priv    Pointer to main private data structure.
 *  @param  chan    Channel number.
 *  @param  queue   Queue number.
 *  @param  skip    ???
 *
 *  @return 0:      Success
 *          -1:     Failure
 */
int DDC_sar_tx_flush(DDC_DslPriv *priv, int chan, int queue, int skip);

/**
 *  \brief  Generate OAM data.
 *
 *  @param  priv    Pointer to main private data structure.
 *  @param  chan    Channel number.
 *  @param  type    
 *  @param  vpi     VPI
 *  @param  vci     VCI
 *  @param  timeout
 *
 *  @return 0:      Success
 *          -1:     Failure
 */
int DDC_sar_oam_generation(DDC_DslPriv *priv, int chan, int type, int vpi, int vci, int timeout);


#ifdef AR7_SAR
void DDC_atm_sarhal_isr_register(void *os_dev, int (*hal_isr)(HAL_DEVICE*, int*), int interrupt_num);
#endif

/**
 *  \brief  TBD
 */
int DDC_sar_atm_header(int vpi, int vci);

/**
 *  \brief  TBD
 */
int DDC_sar_control(void *dev_info, const char *key, const char *action, void *value);

#ifdef AR7_SAR
int DDC_sar_process_unmatched_oam(FRAGLIST *frag_list, unsigned int frag_count, unsigned int packet_size, unsigned int mode);
#endif
#ifdef UR8_SAR
int DDC_sar_process_unmatched_oam(unsigned char *data, unsigned int packet_size);
#endif

/**
 *  \brief  Reset AAL5 statistics.
 *
 *  @return         None. 
 */
void DDC_sar_stat_reset(void);


/**
 *  Tx/Rx
 */

/**
 *  \brief  TBD
 */
void DDC_atm_data_invalidate(void *pmem, int size);

/**
 *  \brief  TBD
 */
void DDC_atm_data_writeback(void *pmem, int size);

#ifdef UR8_SAR
int DDC_sar_receive(void *os_dev, DDC_NetPktObj * pkt, void *chan, void* arg);
#endif
#ifdef AR7_SAR
int DDC_sar_receive(void *os_dev, FRAGLIST *frag_list, unsigned int frag_count, unsigned int packet_size,
                 HAL_RECEIVEINFO *hal_receive_info, unsigned int mode);
#endif

/**
 *  \brief  Call SAR HAL to send a packet.
 *
 *  @param  priv    Pointer to main private data structure.
 *  @param  chan    Channel number to send packet.
 *  @param  new_skb pointer to a packet.
 *  @param  data    pointer to data buffer of the packet.
 *  @param  len     length of the packet.
 *  @param  pri     priority of the packet.
 *
 *  @return 0:      Success
 *          1:      Failure
 */
int DDC_sar_send_packet(DDC_DslPriv *priv, int chan, void *new_skb, void *data,unsigned len, int pri);


/**
 *  \brief  This function returns a boolean value to indicate 
 *          whether the chip supports ADSL2 and ADSL2+.
 *
 *  @return 0:      Success
 *          1:      Failure
 */
int DDC_atm_read_can_support_adsl2 (void);

#endif  /*_DDC_DSL_API_H_*/

